Faculty

NCTU CSIE

Computer Science and Information Engineering

Faculty
     Eduation  |  Professional Background  |  Research  Interest |  Research Achievement  |  Publications





       Terng-Yin Hsu 許 騰 尹

EC419   Office Tel:N/A
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Education:

1999

Ph.D. in Electronic Engineering, National Chiao Tung University.

1995

S.M. in Electronic Engineering, Feng Chia University.

1993

B.S. in Electronic Engineering, Feng Chia University.

Professional Background:

[2003.2 ~ Present]

國 立 交 通 大 學 資 工 系 助 理 教 授 .

[2002.8~2003.1]

經 濟 部 學 界 科 專 － 延 聘 專 家.

[2002.2~2002.8]

國 立 交 通 大 學 電 信 系 兼 任 助 理 教 授.

[2001.8~2003.8]

矽 成 積 體 電 路 股 份 有 限 公 司 技 術 顧 問.

[2002.7~2002.12]

絡 達 科 技 股 份 有 限 公 司 技 術 顧 問.

[2001.1~2002.3]

亞 信 科 技 股 份 有 限 公 司 技 術 顧 問.

[2000.8~2002.7]

明 新 科 技 大 學 電 子 系 專 任 助 理 教 授.

[1999.9~2000.7]

國 立 交 通 大 學 電 子 所 博 士 後 研 究 .

[1999.2~1999.7]

力 訊 科 技 股 份 有 限 公 司 設 計 顧 問.

[1997.9~1999.6]

IC Lab － IMS 測 試 課 程 教 學 助 教.

[1995.9~1996.9]

IEEE 台 灣 分 會 資 料 庫 管 理.

次 微 米 人 才 培 訓 中 心 任 課 教 師.

通 訊 人 才 培 訓 中 心 任 課 教 師.

Research Interest:

· Communication Systems
· Wireless/Wireline transmission
· VLSI architectures
· Spread Spectrum Communications
· Network PHY
· High-speed networking
· Communication IPs
· Phase-Locked Loop/ Delay-Locked Loop
· System-on-Chip (SOC) design technology
· Analog-like Digital Circuits

Research Topic:

Communication/Network SOC Designs and ADPLL/ADDLL Applications.

Honor and Award

  1. 1998 Best Student Paper Award in IEEE Consumer Electronic Society (ISCE'98)。

  2. 87年教育部所主辦的積體電路設計競賽之標準單元設計優等。

  3. 88年教育部所主辦的IP設計競賽之Soft IP設計佳作。

Major Research Achievement

Patent List:

  1. USA - METHOD AND DEVICE FOR DIGITALLY SYNTHESIZING FREGUENCY (US006150892A).

  2. 中華民國 - 數位頻率合成器及其頻率合成方法 (發明第119348號).

  3. USA - METHOD OF OPERATING A MATCHED FILTER OF A PAM WITH VARIABLE LENGTHS (已申請).

  4. 中華民國 - 可變長度匹配濾波器訊號操作 (已申請).

  5. USA - METHOD OF OPERATING AN ARCTAN FOR DQPSK DEMODULATION (已申請).

  6. 中華民國 - 反三角函數操作及其差動相角解調變應用 (已申請).

Research Projects:
Project Name
合作單位
A Chip-Set Design for ATM Concentrator (2 years)/[84~86]
電信研究所
The Study of Multi-Casting ATM Switch System for Vedio-on-Demand (2 years)/[86~88]
國科會
The Study of Circuit Design for ATM Switch [86~87]
工研院
無線區域網路基頻積體電路 (2 years)/[87~88]
思源基金會
經濟部科專計畫-通訊基頻積體電路設計 (2 years)/[88~90]
旺宏/智邦
平面顯示器控制晶片 [87~88]
創品
全數位鎖相迴路設計與應用之研究 (3 years)/[88~91]
國科會
The Study of ADPLL for Data Synchronization in Display Panel [88~89]
創品
4G ─ OFDM Baseband Designs (共同主持)/[90~91]
國科會
教育部特色教改計劃 (明新/主持) [90~91]
教育部
IEEE 802.11g OFDM Baseband Designs (共同主持)/[90~91]
亞信
IEEE 802.11b CCK Baseband Designs (Project Leader)[89~91]
交大TWT
經濟部學界科專-OFDM Baseband Designs (3 years) (共同主持)/[91~94]
經濟部
Bluetooth GFSK Modem (共同主持) [90~91]
矽成
Wireless high-data-rate Modem (共同主持)/[91~92]
矽成
NCTU/ADPLL based Clock Generator (技術移轉)
工研院
以正交分頻多工為基礎之多模式基頻收發器研製 [91~94]
國科會
DVB－OFDM Baseband Designs (共同主持)/[91~92]
創品
ADDLL/ADPLL-based LVDS Applications (技術合作)
博旺

　

Publication List

(A)期刊論文

    1. Terng-Yin Hsu, Bai-Jue Shieh, and Chen-Yi Lee, "An All-Digital Phase-Locked Loop (ADPLL)-based Clock Recovery Circuit," IEEE J. Solid-State Circuits, vol. 34, no. 8, Aug., 1999. (NSC88-2215-E-009-068).

    2. Terng-Yin Hsu, Chung-Cheng Wang, and Chen-Yi Lee, "Design and Analysis of A Portable High-Speed Clock Generator," IEEE Trans. CAS II, vol. 48, no. 4, April, 2001. (NSC89-2215-E-009-053).

    3. Terng-Yin Hsu, Terng-Ren Hsu, Chung-Cheng Wang, Yi-Chuan Liu, and Chen-Yi Lee, "Design of A Wideband Frequency Synthesizer based on TDC and DVC Techniques," IEEE J. Solid-State Circuit, vol. 37, no. 10, Oct., 2002. (NSC90-2215-E-009-105)

    4. Terng-Yin Hsu, Hsuan-Yu Liu, and Chen-Yi Lee," A Robust Timing Synchronization with Wide Clock-Offset Tolerance in WLAN Applications," under preparation for submission to IEEE Trans. CAS II.

    5. Terng-Yin Hsu, and Chen-Yi Lee, "Design of An All-Digital Perod-Locked Loop for Clock Generators ," under preparation for submission to IEEE Trans. CAS II.

    6. Terng-Yin Hsu, and Chen-Yi Lee, "An All-Digital Period-Locked based Clock Generator in Gate-Array Processes," under preparation for submission to IEEE J. Solid-State Circuits.

    7. Terng-Ren Hsu, Terng-Yin Hsu, and Chen-Yi Lee, "Design and Analysis of Neural-based Equalization for NRZ Signal Recovery in Band-Limited Channels," under preparation for submission to IEEE Trans. Neural Network.

(B)研討會論文

    1. Terng-Yin Hsu, and Chen-Yin Lee, "The Outage Probability in DS/CDMA for Cellular Mobile Radio with Imperfect Power Control," in Proc. IEEE/PIMRC'96, Taipei, pp.185~191, Oct. 16, 1996.

    2. Terng-Yin Hsu, and Chen-Yin Lee, "Effects of Shadowing, Multipath Fading, Antenna Diversity in DS/CDMA for Cellular Mobile Radio with Reverse-Link Power Control, " in Proc. IEEE/GLOBECOM'97, Phoenix, Nov., 1997.

    3. Terng-Yin Hsu, and Chen-Yin Lee, "System Capacity for Cellular DS/CDMA Mobile Radio with Forward-Link Power Control in Shadowing and Multipath fading Environment, " in Proc. IEICE/TJCOM'98, Hsinchu, Jan., 1998.

    4. Terng-Yin Hsu, Wisely Wu, Woei-Ren Lou, Jer-Min Tsai, and Chen-Yi Lee, "A Chip-Set for ATM Packet Video Switching," in Proc. IEEE/ISCE'98, Oct., Taipei, 1998.

    5. [12] Bai-Jue Shieh, Terng-Yin Hsu, and Chen-Yi Lee, "A New Approach of Group-Based VLC Codec System, " in ISCAS'2000, May, 2000.

    6. Hsuan-Yu Liu, Shuenn-Der Tzeng, Yi-Chuan Liu, Chung-Cheng Wang, Terng-Ren Hsu, Terng-Yin Hsu, and Chen-Yi Lee, "A High Clock-Offset Tolerance for DSSS Synchronization, " in MWSCAS'2000, Lansing, Michigan, August, 2000.

    7. Terng-Ren Hsu, Terng-Yin Hsu, Hsuan-Yu Liu, Shuenn-Der Tzeng, Jyh-Neng Yang and Chen-Yi Lee, "A MLP/BP-based Equalizer for NRZ Signal Recovery in Band-Limited Channels, " in MWSCAS'2000, Lansing, Michigan, August, 2000.

    8. Jyh-Neng Yang, Chen-Yi Lee, Terng-Yin Hsu, Terng-Ren Hsu, and Chung-Cheng Wang, "A 1.5-V, 2.4GHz CMOS low-noise amplifier, " in MWSCAS'2000, Lansing, Michigan, August, 2000.

    9. Yi-Chuan Liu, Chung-Cheng Wang, Terng-Yin Hsu, and Chen-Yi Lee, "A Wideband Digital Frequency Synthesizer, " in ISCAS'2001, Sydney, May, 2001.

    10. Jhy-NengYang, Yi-Chang Cheng, Terng-Yin Hsu, Terng-Ren Hsu, and Chen-Yi Lee, "A 1.75GHz inductor-less CMOS low noise amplifier with high-Q active inductor load, " in MWSCAS, 2001

    11. Hsuan-Yu Liu, Terng-Yin Hsu, and Chen-Yi Lee, "Smoothing and decision-directed channel estimation for OFDM WLAN systems, " submitted to ISCAS'2003

    12. Jin-Jing Chen, Hsuan-Yu Liu, Terng-Yin Hsu, Tzu-Ming Liu and Chen-Yi Lee, "An Efficient Frame Synchronization for OFDM, " submitted to ISCAS'2003